Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.
Interactive website for demonstrating or simulating binary multiplication via pencil-and-paper method, Booth's algorithm, and extended Booth's algorithm (bit-pair recoding)
Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.
⚡This project aims to implement 6 different multipliers including the radix-4 booth multiplier, a multiplier tree, floating-point multiplier and more.. in verilog as well as synthesize each one on Oasys with appropriate scripts and finally route the complete design on Nitro to obtain its layout. DRC and LVS checks were also made for floating-point.
A comparison study between different FFT algorithms implemented in Java as part of the bachelor's degree. Implemented algorithms: Furier transform by definition, radix-2 (DIT) recursive, radix-2 (DIT) iterative, radix-2 (DIF) recursive, radix-4 (DIT) recursive, radix-4 (DIF) recursive, radix-4 (DIT) iterative, split radix (DIT), split radix (DIF…
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