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yosys-slang

Here are 2 public repositories matching this topic...

PyFPGA / HDLconv

HDL converter (between VHDL, SystemVerilog and/or Verilog), based on GHDL, Yosys, and the plugins ghdl-yosys-plugin and yosys-slang.

vhdl verilog systemverilog ghdl yosys ghdl-yosys-plugin yosys-slang

Updated Jan 8, 2025
Python

PyFPGA / containers

Containers for FOSS tools

slang ghdl yosys ghdl-yosys-plugin verible surelog synlig vhd2vl sv2v yosys-slang

Updated Jan 9, 2025
Shell

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