07_Data_Cache_Manager.md

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Data Cache Manager

(Any Notes would go here)

Contents

• Inputs
• Outputs
• Functionality
  • Registers
  • Clk
  • Active low reset

Inputs

Name	Bits wide
clk	1-bit
rstn	1-bit
dcache_en	1-bit
dcache_rw	1-bit
data_mode	2-bits
addr	32-bits
data	32-bits

Outputs

Name	Bits wide
mrd	32-bits

Functionality

Registers

• #-bit name register
• #-bit name register

On posedge clk

• somebranch = someval
• Use a table when necessary if statements are used:
• name

  Name	Bits wide
  name == 0	reg = val
  name == 1	reg = val

Asynchronous active low reset

• Register values reset to 0