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drivers: sdhc: Add MAX32 SDHC driver #83464

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drivers: sdhc: Add MAX32 SDHC driver #83464

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5d65eb1
manifest: hal_adi: Pull sdhc header
mertekren Jan 3, 2025
e16df4d
dts: Add MAX32666 SDHC nodes and bindings
mertekren Oct 3, 2024
202f83c
drivers: sdhc: Add MAX32666 SDHC driver
mertekren Sep 12, 2024
4e37905
boards: Add SDHC driver for MAX32666FTHR
mertekren Oct 3, 2024
f7f9dad
samples: drivers: sdhc: fs_sample: Add MAX32666fthr
mertekren Sep 12, 2024
7536b2d
tests: drivers: sdhc: Add MAX32666fthr to disk performance test
mertekren Jan 9, 2025
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2 changes: 2 additions & 0 deletions boards/adi/max32666fthr/doc/index.rst
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Original file line number Diff line number Diff line change
Expand Up @@ -126,6 +126,8 @@ Below interfaces are supported by Zephyr on MAX32666FTHR.
+-----------+------------+-------------------------------------+
| Flash | on-chip | flash |
+-----------+------------+-------------------------------------+
| SDHC | on-chip | sd host controller |
+-----------+------------+-------------------------------------+

Connections and IOs
===================
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54 changes: 54 additions & 0 deletions boards/adi/max32666fthr/max32666fthr_max32666_cpu0.dts
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Expand Up @@ -55,6 +55,7 @@
led2 = &led3;
sw0 = &pb1;
watchdog0 = &wdt0;
sdhc0 = &sdhc0;
};

/* Used for accessing other pins */
Expand Down Expand Up @@ -134,3 +135,56 @@
pinctrl-0 = <&owm_io_p0_12>;
pinctrl-names = "default";
};

&sdhc0 {
pinctrl-0 = <&sdhc_dat3_p1_0 &sdhc_cmd_p1_1 &sdhc_dat0_p1_2 &sdhc_clk_p1_3
&sdhc_dat1_p1_4 &sdhc_dat2_p1_5 &sdhc_wp_p1_6 &sdhc_cdn_p1_7>;
pinctrl-names = "default";
};

&sdhc_dat3_p1_0 {
power-source = <MAX32_VSEL_VDDIO>;
drive-strength = <1>;
};

&sdhc_cmd_p1_1 {
power-source = <MAX32_VSEL_VDDIO>;
drive-strength = <1>;
};

&sdhc_dat0_p1_2 {
power-source = <MAX32_VSEL_VDDIOH>;
drive-strength = <1>;
};

&sdhc_clk_p1_3 {
power-source = <MAX32_VSEL_VDDIOH>;
drive-strength = <1>;
};

&sdhc_dat1_p1_4 {
power-source = <MAX32_VSEL_VDDIOH>;
drive-strength = <1>;
};

&sdhc_dat2_p1_5 {
power-source = <MAX32_VSEL_VDDIOH>;
drive-strength = <1>;
};

&sdhc_wp_p1_6 {
power-source = <MAX32_VSEL_VDDIOH>;
drive-strength = <1>;
};

&sdhc_cdn_p1_7 {
power-source = <MAX32_VSEL_VDDIOH>;
drive-strength = <1>;
};

&sdhc0 {
status = "okay";
mmc {
status = "okay";
};
};
1 change: 1 addition & 0 deletions boards/adi/max32666fthr/max32666fthr_max32666_cpu0.yaml
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Expand Up @@ -20,5 +20,6 @@ supported:
- pwm
- w1
- flash
- sdhc
ram: 560
flash: 1024
1 change: 1 addition & 0 deletions drivers/sdhc/CMakeLists.txt
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Expand Up @@ -13,4 +13,5 @@ zephyr_library_sources_ifdef(CONFIG_SDHC_INFINEON_CAT1 ifx_cat1_sdio.c)
zephyr_library_sources_ifdef(CONFIG_CDNS_SDHC sdhc_cdns_ll.c sdhc_cdns.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_ESP32 sdhc_esp32.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_RENESAS_RA sdhc_renesas_ra.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_MAX32 sdhc_max32.c)
endif()
1 change: 1 addition & 0 deletions drivers/sdhc/Kconfig
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Expand Up @@ -18,6 +18,7 @@ source "drivers/sdhc/Kconfig.intel"
source "drivers/sdhc/Kconfig.sdhc_cdns"
source "drivers/sdhc/Kconfig.esp32"
source "drivers/sdhc/Kconfig.renesas_ra"
source "drivers/sdhc/Kconfig.max32"

config SDHC_INIT_PRIORITY
int "SDHC driver init priority"
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10 changes: 10 additions & 0 deletions drivers/sdhc/Kconfig.max32
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@@ -0,0 +1,10 @@
# Copyright (c) 2024 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0

config SDHC_MAX32
bool "Analog Devices MAX32 SDHC driver"
default y
depends on DT_HAS_ADI_MAX32_SDHC_ENABLED
select SDHC_SUPPORTS_NATIVE_MODE
help
sdhc driver for max32 family.
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