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Optimize stack management, fix preemption, and add automated QEMU testing for RISC-V32 port#513

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Winstonllllai wants to merge 11 commits intoeclipse-threadx:masterfrom
Winstonllllai:rv32-fix-feature
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Optimize stack management, fix preemption, and add automated QEMU testing for RISC-V32 port#513
Winstonllllai wants to merge 11 commits intoeclipse-threadx:masterfrom
Winstonllllai:rv32-fix-feature

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This PR focuses on technical debt cleanup and functional enhancements for the ThreadX RISC-V 32-bit (RV32) port.

  • Symbolic Stack Offsets:
    • Replaced hardcoded magic numbers in .S files with symbolic macros in tx_port.h.
    • Decoupled stack layout for easier future updates (e.g., Vector or Lazy FPU extensions).
  • Scheduler & Preemption Fixes:
    • Refactored _tx_thread_context_restore to resolve potential race conditions in high-priority task preemption.
    • Integrated the wfi (Wait For Interrupt) instruction to optimize CPU idle cycles and power efficiency.
  • Automated Testing Framework:
    • Introduced a Python-based E2E test harness using QEMU + GDB.
    • Validates multitasking, timer interrupts, FPU context preservation, and priority consistency.
  • Linker & Performance Optimization:
    • Defined __global_pointer$ in link.lds to enable GP Relaxation.
    • Reduced code size and improved global variable access efficiency.

How to Run Tests

To verify the changes using the automated framework, please run the following commands:

cd build_qemu
make check-functional-riscv32

This is my first PR in Threadx. Please let me know if there’s anything I should improve or if I missed anything.

Optimized system reliability and interrupt latency by implementing wfi in the idle loop
and enforcing 16-byte alignment for the system stack.

Details:
1. Reliability (WFI) Implementation: Modified tx_thread_schedule.S to include the
wfi (Wait For Interrupt) instruction in the idle loop.
The scheduler now enters low-power sleep mode when no threads are ready,
instead of busy-waiting, reducing significant power consumption.
2. Interrupt Latency (Shadow Stack Alignment): Updated tx_initialize_low_level.S to
enforce 16-byte alignment on the system stack pointer (sp) before saving it to
_tx_thread_system_stack_ptr.
Ensures strict adherence to the RISC-V ABI and prevents misaligned access faults
or performance penalties during context switches to the interrupt stack.
- Add Python-based test runner automating QEMU launch and GDB control.
  - Verifies Context Switching, FPU Context Preservation, and Timer Interrupts.
  - Implements robust cleanup using try-finally blocks to prevent orphaned QEMU processes.
- Update CMake configuration to include the `check-functional-riscv32` target.
- Add floating-point arithmetic test logic to thread entry function.
- Add global pointer definition to linker script to resolve relocation errors.
- Enabled `-mrelax` compiler flag in CMake configuration.
- Updated entry.s to correctly initialize the Global Pointer (`gp`) using
the `__global_pointer$` symbol.
- Verified that `gp` is treated as a constant and no longer saved/restored
during context switches, improving performance.
- Implement symbolic stack offsets for RISC-V 32-bit GNU port.
- Harmonize context restoration across all scheduling paths.
- Clean up assembly files within the risc-v32/gnu source directory.
Standardized stack frame access using sp instead of t0 in tx_thread_context_restore.S.
Fixed global pointer address loading using la for _tx_thread_current_ptr and others.
Implemented dynamic mstatus recovery from stack to preserve FPU and interrupt states.
Optimized register storage sequence in the preemption path for better atomicity.
Adjusted thread priorities in demo_threadx.c to facilitate preemption verification.
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