eclipse-threadx · Winstonllllai · Mar 10, 2026 · Mar 10, 2026 · Jan 8, 2026 · Mar 10, 2026
diff --git a/.gitignore b/.gitignore
@@ -4,6 +4,7 @@
 .tmp/
 _deps/
 build/
+build_qemu/
 Debug/
 CMakeFiles/
 CMakeScripts/

diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -69,4 +69,49 @@ set(CPACK_SOURCE_IGNORE_FILES
   ".*~$"
 )
 set(CPACK_VERBATIM_VARIABLES YES)
-include(CPack)
+include(CPack)
+
+# Enable the QEMU Virt demo application (Target: kernel.elf)
+set(QEMU_DEMO_DIR ${CMAKE_CURRENT_LIST_DIR}/ports/risc-v32/gnu/example_build/qemu_virt)
+
+add_executable(kernel.elf 
+    ${QEMU_DEMO_DIR}/demo_threadx.c
+    ${QEMU_DEMO_DIR}/entry.s
+    ${QEMU_DEMO_DIR}/uart.c
+    ${QEMU_DEMO_DIR}/plic.c
+    ${QEMU_DEMO_DIR}/hwtimer.c
+    ${QEMU_DEMO_DIR}/trap.c
+    ${QEMU_DEMO_DIR}/board.c
+    ${QEMU_DEMO_DIR}/tx_initialize_low_level.S
+)
+
+target_link_libraries(kernel.elf PRIVATE threadx)
+
+target_include_directories(kernel.elf PRIVATE 
+    ${CMAKE_CURRENT_LIST_DIR}/common/inc 
+    ${CMAKE_CURRENT_LIST_DIR}/ports/${THREADX_ARCH}/${THREADX_TOOLCHAIN}/inc
+    ${QEMU_DEMO_DIR}
+)
+
+# Linker options
+target_link_options(kernel.elf PRIVATE 
+    -T${QEMU_DEMO_DIR}/link.lds 
+    -nostartfiles
+    -Wl,-Map=kernel.map
+)
+
+# QEMU Test Runner Target
+find_package(Python3 COMPONENTS Interpreter)
+if(Python3_FOUND)
+    add_custom_target(check-functional-riscv32
+        COMMAND ${Python3_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/test/ports/azrtos_test_tx_gnu_riscv32_qemu.py 
+            --elf $<TARGET_FILE:kernel.elf>
+            --qemu qemu-system-riscv32
+            --gdb gdb
+        DEPENDS kernel.elf
+        WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
+        COMMENT "Running QEMU/GDB Test Runner..."
+    )
+else()
+    message(WARNING "Python3 not found, run_qemu_test target will not be available.")
+endif()
diff --git a/cmake/riscv32_gnu.cmake b/cmake/riscv32_gnu.cmake
@@ -4,7 +4,7 @@ set(CMAKE_SYSTEM_PROCESSOR risc-v32)
 
 set(THREADX_ARCH "risc-v32")
 set(THREADX_TOOLCHAIN "gnu")
-set(ARCH_FLAGS "-g -march=rv32gc -mabi=ilp32d -mcmodel=medany")
+set(ARCH_FLAGS "-g -march=rv32gc -mabi=ilp32d -mcmodel=medany -mrelax")
 set(CFLAGS "${ARCH_FLAGS}")
 set(ASFLAGS "${ARCH_FLAGS}")
 set(LDFLAGS "${ARCH_FLAGS}")

diff --git a/ports/risc-v32/gnu/example_build/qemu_virt/demo_threadx.c b/ports/risc-v32/gnu/example_build/qemu_virt/demo_threadx.c
@@ -112,7 +112,7 @@ void    tx_application_define(void *first_unused_memory)
 
     tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2,
             pointer, DEMO_STACK_SIZE,
-            16, 16, 4, TX_AUTO_START);
+            10, 10, 4, TX_AUTO_START);
 
     /* Allocate the stack for thread 3.  */
     tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
@@ -201,7 +201,7 @@ UINT    status;
         thread_0_counter++;
 
         /* Sleep for 10 ticks.  */
-        tx_thread_sleep(10);
+        tx_thread_sleep(1);
 
         /* Set event flag 0 to wakeup thread 5.  */
         status =  tx_event_flags_set(&event_flags_0, 0x1, TX_OR);
@@ -337,6 +337,7 @@ ULONG   actual_flags;
     }
 }
 
+float   fpu_test_val = 0.0f;
 
 void    thread_6_and_7_entry(ULONG thread_input)
 {
@@ -363,6 +364,9 @@ UINT    status;
         if (status != TX_SUCCESS)
             break;
 
+        /* FPU Test*/
+        fpu_test_val += 1.1f;
+
         /* Get the mutex again with suspension.  This shows
            that an owning thread may retrieve the mutex it
            owns multiple times.  */

diff --git a/ports/risc-v32/gnu/example_build/qemu_virt/entry.s b/ports/risc-v32/gnu/example_build/qemu_virt/entry.s
@@ -1,5 +1,5 @@
 
-.section .text
+.section .init
 .align 4
 .global _start
 .extern main
@@ -11,7 +11,10 @@ _start:
 	bne  t0, zero, 1f
 	li x1, 0
 	li x2, 0
-	li x3, 0
+.option push
+.option norelax
+	la gp, __global_pointer$
+.option pop
 	li x4, 0
 	li x5, 0
 	li x6, 0

diff --git a/ports/risc-v32/gnu/example_build/qemu_virt/link.lds b/ports/risc-v32/gnu/example_build/qemu_virt/link.lds
@@ -8,6 +8,10 @@ SECTIONS
    * where qemu's -kernel jumps.
    */
   . = 0x80000000;
+
+  .init : {
+    KEEP (*(.init))
+  }
 
   .text : {
     *(.text .text.*)
@@ -24,6 +28,7 @@ SECTIONS
 
   .data : {
     . = ALIGN(16);
+    PROVIDE( __global_pointer$ = . + 0x800 );
     *(.sdata .sdata.*) /* do not need to distinguish this from .data */
     . = ALIGN(16);
     *(.data .data.*)

diff --git a/ports/risc-v32/gnu/example_build/qemu_virt/tx_initialize_low_level.S b/ports/risc-v32/gnu/example_build/qemu_virt/tx_initialize_low_level.S
@@ -9,6 +9,7 @@
  **************************************************************************/
 
 #include "csr.h"
+#include "tx_port.h"
 
  .section .text
  .align 4
@@ -21,6 +22,7 @@
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    Akif Ejaz, 10xEngineers            		                          */
+/*    Wei-Chen Lai, National Cheng Kung University                        */
 /*                                                                        */
 /*  DESCRIPTION                                                           */
 /*                                                                        */
@@ -60,13 +62,13 @@
     .extern  trap_handler
     .extern  _tx_thread_context_restore
     trap_entry:
-#if defined(__riscv_float_abi_single) || defined(__riscv_float_abi_double)
-	addi sp, sp, -260         // Allocate space for all registers - with floating point enabled (65*4)
+#if defined(__riscv_flen) && ((__riscv_flen == 32)||(__riscv_flen == 64))
+	addi sp, sp, -65*REGBYTES         // Allocate space for all registers - with floating point enabled
 #else
-	addi sp, sp, -128         // Allocate space for all registers - without floating point enabled (32*4)
+	addi sp, sp, -32*REGBYTES         // Allocate space for all registers - without floating point enabled
 #endif
 
-	sw   x1, 112(sp)         // Store RA (28*4 = 112, because call will override ra [ra is a callee register in riscv])
+	STORE   x1, 28*REGBYTES(sp)       // Store RA, 28*REGBYTES(because call will override ra [ra is a calle register in riscv])
 
     	call    _tx_thread_context_save
 
@@ -133,6 +135,11 @@ _err:
     .extern  board_init
 _tx_initialize_low_level:
 
+/*  debug print
+    .section .rodata
+debug_str_init:
+    .string "DEBUG : threadx/ports/risc-v32/gnu/example_build/qemu_virt/tx_initialize_low_level.S, _tx_initialize_low_level\n"
+*/
     .section .text
 
     la      t0, _tx_thread_system_stack_ptr
@@ -155,6 +162,10 @@ _tx_initialize_low_level:
     addi    sp, sp, -4
     sw	    ra, 0(sp)
     call    board_init
+/*  debug print
+    la      a0, debug_str_init
+    call    uart_puts
+*/
     lw	    ra, 0(sp)
     addi    sp, sp, 4
     la	    t0, trap_entry
-Original file line number
+Diff line change
@@ Expand Up / @@ -4,6 +4,7 @@ @@
     .tmp/
     _deps/
     build/
+    build_qemu/
     Debug/
     CMakeFiles/
     CMakeScripts/
@@ Expand Down @@