A simulation of the Tomasulo algorithm, a hardware algorithm for out-of-order scheduling and execution of computer instructions, written in C++.

A simple tomasulo simulator written in Rust for the course Computer Architecture.

Algorithm to simulate tomasulo algorithm. The algorithm shows step by step output.

An out-of-order execution CPU simulator for CS2410 Computer Architecture course final project at the University of Pittsburgh.

Project developed for Computer Architecture course

Simulation of the Tomasulo architecture and algorithm for microprocessors

Introduction in Dynamic Instruction Scheduling (Advanced Computer Architecture) implementing Tomasulo's Algorithm

An Out-of-Order Processor in VHDL based on the Speculative Tomasulo algorithm. Computer Architecture coursework @ Technical University of Crete. Teammate: Anastasios Kampylafkas, github.com/Gabilons

Tomasulo algorithm, Python Implementation

A superscalar out-of‐order architectural simulator (With Memory Hierarchy).

Continuation of a functional Tomasulo out-of-order processor, with a cache prefetcher and replacement policy. Implements most of the RV32I ISA.

Simple Tomasulo based processor back-end using VHDL. HRY415-project-3

A 5-stage CPU pipeline simulator based on the well-known Tomasulo algorithm.

TOMASULO processor in VHDL implementation

Tomasulo algorithm visualizer

A superscalar processor in Python

🔬 toy RISCV CPU based on Tomasulo Algorithm

Computer Architecture, Jul-Nov 2021

Tomasulo algorithm's simulator

🕹️ ProjectAris aims at implementing a single core, single thread and RV32I based CPU in Verilog.