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GUI CPU

Dimitris Panokostas edited this page Mar 16, 2026 · 2 revisions

CPU Panel

PanelCPU

Configures the emulated Motorola 680x0 processor, floating-point unit, memory management unit, JIT compiler, and CPU speed settings.

CPU

CPU Model

Selects the 680x0 processor to emulate:

  • 68000 — Original Amiga 500/1000/2000 CPU
  • 68010 — Slightly faster variant of the 68000, used in some accelerators
  • 68020 — 32-bit CPU used in the Amiga 1200
  • 68030 — Amiga 3000/4000 CPU; includes an MMU
  • 68040 — Faster 32-bit CPU with integrated FPU and MMU
  • 68060 — Fastest Amiga CPU

24-bit addressing

  • Restricts the address bus to 24 bits, matching the original A500/A1200 hardware
  • Required for compatibility with software that relies on the 24-bit address space
  • Disable when using Zorro III (Z3) RAM expansions

More compatible

  • Approximates the prefetch pipeline of the 68000/010
  • Required for timing-sensitive games and demos
  • Automatically enabled when cycle-exact emulation is active

Unimplemented CPU emu

  • Emulates unimplemented 68060 instructions in software
  • Only available when the 68060 CPU model is selected without JIT

Data cache emulation

  • Emulates the CPU data cache present in 68030 and later processors
  • Required for some 68030+ software; only available when JIT is disabled

JIT

  • Enables Just-In-Time compilation of 68k code to native host code
  • Greatly speeds up CPU emulation but reduces compatibility
  • Requires a 68020 or higher CPU model with 32-bit addressing

MMU

None

  • Disables Memory Management Unit emulation

MMU

  • Enables full MMU emulation
  • Required for operating systems that use virtual memory (e.g., NetBSD, Linux/m68k)

EC

  • Enables the EC (Economy) variant of the MMU, which has a reduced address bus

FPU

None

  • Disables the Floating Point Unit

68881

  • External Motorola 68881 FPU; used with 68020 or 68030 CPUs

68882

  • External Motorola 68882 FPU; faster version of the 68881

CPU internal

  • Uses the FPU built into the 68040 or 68060 CPU

More compatible

  • Enables more accurate but slower FPU emulation

FPU precision mode

  • Host (64-bit) — Uses the host CPU's 64-bit double precision
  • Host (80-bit) — Uses the host CPU's 80-bit extended precision (x87)
  • Softfloat (80-bit) — Software-emulated 80-bit precision; most accurate but slowest

Unimplemented FPU emu

  • Emulates unimplemented FPU instructions in software
  • Only available when an FPU is selected and JIT is disabled

CPU Speed

Fastest Possible

  • Runs the CPU as fast as the host system allows
  • Best for Workbench use and applications; not suitable for most games

Approximate A500/A1200 or cycle-exact

  • Matches the original Amiga CPU speed
  • Required for most games and demos

CPU Speed (slider)

  • Fine-tunes the CPU speed as a percentage offset from the base speed
  • Range: -90% to +5000%; available when "Fastest Possible" is not selected

CPU Idle (slider)

  • Controls how aggressively the emulator yields CPU time when the emulated CPU is idle
  • Higher values reduce host CPU usage at the cost of emulation responsiveness

Cycle-Exact CPU Emulation Speed

CPU Frequency

  • Sets the clock multiplier for cycle-exact or compatible emulation
  • Options: 1x, 2x (A500), 4x (A1200), 8x, 16x
  • A read-only field next to the combo shows the resulting frequency in MHz

Multi-threaded CPU

  • Runs CPU emulation on a separate thread
  • Experimental; not available with compatible or cycle-exact modes

PowerPC CPU Options

PPC CPU emulation

  • Enables PowerPC CPU emulation for CyberStorm PPC or Blizzard PPC accelerator boards
  • Requires a 68040 or higher CPU model

Stopped M68K CPU idle mode (slider)

  • Controls how much host CPU time is used when the M68K is stopped waiting for the PPC
  • Range: 0–10; only active when PPC emulation is enabled

x86 Bridgeboard CPU options

CPU Speed (slider)

  • Adjusts the speed of the emulated x86 bridgeboard CPU as a percentage
  • Only active when an x86 bridgeboard is configured

Advanced JIT Settings

Cache size (slider)

  • Sets the size of the JIT translation cache
  • Range: 0 (disabled) to 5 steps (1 MB, 2 MB, 4 MB, 8 MB, 16 MB)
  • The current size in MB is shown next to the slider

FPU Support

  • Enables JIT compilation for FPU instructions

Constant jump

  • Enables a JIT optimization for constant branch targets

Hard flush

  • Flushes the entire JIT cache on every reset or resize

No flags

  • Skips updating CPU status flags in compiled code; faster but less compatible

Catch exceptions

  • Catches memory access faults in JIT-compiled code

Memory Access

  • Direct — JIT accesses emulated memory directly; faster but less compatible
  • Indirect — JIT uses indirect memory access; slower but more compatible

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